Overview

This unit of study aims to introduce you to a range of techniques and methodologies used in embedded system design through the design and implementation of a system-on-a-chip (SOC) project to accomplish an interactive task involving hardware and software aspects.

Requisites

Prerequisites
EEE40002 Integrated Circuit Design
Teaching periods
Location
Start and end dates
Last self-enrolment date
Census date
Last withdraw without fail date
Results released date

Unit learning outcomes

Students who successfully complete this unit will be able to:

  • Perform symmetrical and unsymmetrical fault analysis using the method of symmetrical components (K1, K2, K3, S1, S2, S3, A2, A4, A5, A6, A7)
  • Design protection schemes for power system components (K1, K2, K3, S1, S2, S3, A2, A4, A5, A6, A7)
  • Develop models for power system components for transient stability analysis and apply extended equal area criterion for general one-machine-infinite-bus systems (K2, K3, S1, S2, S3, A2, A4, A5, A6, A7)
  • Analyse automatic generation control techniques and perform contingency analysis using sensitivity and load flow methods (K1, K2, K3, S1, S2, S3, A2, A4, A5, A6, A7)
  • Write computer programs and solve economic load dispatch problems (K2, K3, S1, S2, S3, A2, A4, A5, A6, A7)

Teaching methods

Hawthorn

Type Hours per week Number of weeks Total (number of hours)
Face to Face Contact (Phasing out)
Lecture		2.00 12 weeks 24
Face to Face Contact (Phasing out)
Tutorial		1.00 11 weeks 11
Face to Face Contact (Phasing out)
Laboratory		2.00 12 weeks 24
Unspecified Learning Activities (Phasing out)
Independent Learning		7.58 12 weeks 91
TOTAL150

Assessment

Type Task Weighting ULOs
Examination Individual  40 - 50%  1,2,3,4 
Project Group  50 - 60%  1,2,3,4 

Hurdle

As the minimum requirements of assessment to pass a unit and meet all ULOs to a minimum standard, an undergraduate student must have achieved:

(i) An aggregate mark of 50% or more, and(ii) At least 40% in the final examStudents who do not successfully achieve hurdle requirement (ii) will receive a maximum of 45% as the total mark for the unit.

Content

  • Overview of embedded systems and their characteristics
  • Embedded system modelling
  • Embedded system hardware and software
  • Real-time constraints
  • Real-time operating systems, software versus hardware concurrency, OS facilities
  • Hardware/software co-design, partitioning and trade-offs
  • Embedded development tools. Analysis and design methods using graphical notations e.g. UML including state diagrams and automated generation of code
  • System-on-a-chip (implementation of a FPGA based project incorporating CPU, peripherals and embedded software)

Study resources

Reading materials

A list of reading materials and/or required textbooks will be available in the Unit Outline on Canvas.