Overview

This unit of study aims to provide students with an understanding of computer system design, particularly the design and implementation of CPU Architecture, RISC Hardware, CPU Caching and Memory Access, and multiprocessor systems.

Requisites

Teaching periods
Location
Start and end dates
Last self-enrolment date
Census date
Last withdraw without fail date
Results released date
Semester 1
Location
Hawthorn
Start and end dates
02-March-2026
31-May-2026
Last self-enrolment date
15-March-2026
Census date
31-March-2026
Last withdraw without fail date
21-April-2026
Results released date
07-July-2026

Learning outcomes

Students who successfully complete this unit will be able to:

  • Describe the different components of a computer system and their purpose. (K2, K3, K6)
  • Appreciate different computer architectures and organizations, and their effect upon operation and performance. (K2, K3, S1, S2, S3, A2)
  • Discuss and apply principles used in instruction set design including that for RISC architectures. (K2, K3, S1, S2, S3, A2)
  • Describe the use of parallelism in multiple processor systems and the constraints that affect its effectiveness. (K2, K3)
  • Discuss the importance of memory hierarchies and the use of caches in modern CPU Architecture design (K2, K3, S3)
  • Construct and deploy a hardware based CPU design (K2, K3, S1, S2, S3)

Teaching methods

Hawthorn

Type Hours per week Number of weeks Total (number of hours)

On-campus
Lecture

 1.00 12 weeks 12
On-campus 
Class		 1.00 11 weeks 11
On-campus
Lab		 2.00 11 weeks 22
Online
Directed Online Learning and Independent Learning		 1.00 12 weeks 12
Unspecified Activities 
Independent Learning		 7.75 12 weeks 93
Total     150

Assessment

Type Task Weighting ULOs
Practical and Oral Examination Individual 25-35% 3,4,5
Laboratory Practicals Individual 10-20% 3,5,6
Applied Project Individual 35-45% 1,2,3,6
Oral Assessment Individual 15-25% 1,2,3

Hurdle

To pass this unit, you must:

  • achieve an aggregate mark for the unit of 50% or more, and
  • achieve at least 40% in the final Oral Defence

Students who do not achieve hurdle requirement 2 will receive a maximum of 45% as the total mark for the unit.

Content

  • Fundamentals of computer design
  • Instruction set principles
  • CISC and RISC architectures
  • Pipelining concepts
  • Cache properties and performance
  • Memory-hierarchy design
  • Multiprocessor design and implementation

  • Graduate Attribute – Communication Skills: Verbal communication
  • Graduate Attribute – Communication Skills: Communicating using different media
  • Graduate Attribute – Digital Literacies: Information literacy
  • Graduate Attribute – Digital Literacies: Technical literacy

Study resources

Reading materials

A list of reading materials and/or required textbooks will be available in the Unit Outline on Canvas.