Digital Electronics Design

EEE20001 12.5 Credit Points Hawthorn, Sarawak Available to incoming Study Abroad and Exchange students

Duration

  • 1 Semester

Contact hours

  • 61 Hours

On-campus unit delivery combines face-to-face and digital learning.

2023 teaching periods

Hawthorn

Higher Ed. Semester 1

Dates:
27 Feb 23 - 28 May 23

Results:
4 Jul 23

Last self enrolment:
12 Mar 23

Census:
31 Mar 23

Last withdraw without fail:
14 Apr 23


Prerequisites


Nil

Corequisites


Nil

Aims and objectives

This unit of study aims to provide you with an overview of the field of digital electronics ranging from basic combinatorial circuits through to general state machine based design. Digital design using discrete logic components and hardware description languages are covered.
 

Unit Learning Outcomes (ULO)

Students who successfully complete this unit will be able to:

1. Design and implement combinatorial digital circuits using gates and logic components such as multiplexers and decoders. (K2, K3, S1, S2, S3)

2. Design and implement synchronous digital systems including counters, arbitrary sequence counters and general state machines. (K2, K3, S1, S2, S3)

3. Design and implement standard Mealy and Moore style state machines. (K2, K3, S1, S2, S3)

4. Design and implement in programmable logic moderately complex digital systems that incorporate control (ULO 3) and data operations (ULOs 1 and 2). (K2, K3, S1, S2, S3)

5. Use a hardware description language (VHDL) to implement ULOs 1, 2, 3 and 4. (K2, K3, S1, S2, S3)

6. Apply Electronic Design Automation (EDA) tools to carry out ULOs 1,2,3,4 and 5. (S1, S2, S3)

7. Appreciate real-world considerations in the design of digital circuits e.g. non-ideal inputs, timing requirements and hazards. (K2, K3, S1, S3)

8. Analyse a problem scenario leading to a design and implementation based upon digital logic using appropriate techniques. (S1, S2, S3)

Swinburne Engineering Competencies (A1-7, K1-6, S1-4): find out more about Engineering Skills and Competencies including the Engineers Australia Stage 1 Competencies.